1. Field of the Invention
This invention relates to high-speed digital circuit technology, and more particularly, to a high-speed signal transmission structure having parallel-disposed and serially-connected vias which is designed for use on a multi-layer circuit board, such as a high-speed digital circuit board, for providing a signal transmission path through the signal electrically-conductive vias that can help prevent resonance effect in the high-speed signal transmitting therethrough to thereby ensure the signal integrity of the transmitted signal.
2. Description of Related Art
With the advent of wireless digital communication technologies, such as wireless networking, mobile phones, GPS (Global Positioning System), etc., the design and manufacture of high-speed digital circuit boards that handle digital signals within the gigahertz range is in high demand in the electronics industry. In circuit layout design, high-speed digital circuit boards typically use microstrips, or striplines, for transmission of digital signals within the range of high frequencies, typically from 1 GHz to 10 GHz (gigahertz). It is to be noted that throughout this patent specification, the term “high-speed digital signal” refers to a digital signal with a frequency above 1 GHz.
High-speed digital circuits are typically constructed on a multi-layer circuit board composed of multiple circuit layers. In the multi-layer structure, signal transmission lines between different circuit layers are interconnected by way of electrically-conductive vias. FIG. 1 show a traditional high-speed signal transmission structure. As shown, this high-speed signal transmission structure is constructed on a multi-layer circuit board 10 of the type having at least one upper layer 21 and one bottom layer 22 with at least one upper reference plane 31 formed on the internal side of the upper layer 21 and one bottom reference plane 32 formed on the internal side of the bottom layer 22 (it is to be noted that FIG. 1 only demonstratively shows two circuit layers 21, 22 in the multi-layer circuit board 10; in practice, the multi-layer circuit board 10 may include more circuit layers). In layout design, this traditional high-speed signal transmission structure comprises: (a) a first electrically-conductive line 110; (b) a second electrically-conductive line 120; and (c) a via 130. The first electrically-conductive line 110 is laid in parallel with and on the external side of the upper reference plane 31 of the multi-layer circuit board 10, and which has a first end 111 and a second end 112, wherein the first end 111 is used for connection with a first electronic component (not shown). The second electrically-conductive line 120 is laid in parallel with and on the internal side of the upper reference 31 of the multi-layer circuit board 10, and which has a first end 121 and a second end 122, wherein the first end 121 is used for connection with a second electronic component (not shown).
In the above-mentioned high-speed signal transmission structure, since the first electrically-conductive line 110 is laid above the upper reference plane 31 while the second electrically-conductive line 120 is laid beneath the upper reference plane 31, it requires the provision of the via 130 which penetrates through the multi-layer circuit board 10 for interconnecting the second end 112 of the first electrically-conductive line 110 with the second end 122 of the second electrically-conductive line 120. Thus, the provision of the via 130 allows the construction of a continuous signal transmission path from the first electrically-conductive line 110 to the second electrically-conductive line 120 (the signal transmission path is indicated by a series of arrows in FIG. 1).
One drawback to the provision of the aforementioned via 130, however, is that the via 130 only has a small portion 131 (hereinafter referred to as “upper-end transmission portion”) which is actually used for signal transmission, and has a lengthy portion 132 on the bottom side which effectively act as an open stub. The existence of the open stub 132 would then undesirably cause the transmitting high-speed signal to be subject to resonance and thus undesirably degrade signal integrity.
One solution to the foregoing problem is to utilize a back-drill method to remove the open stub 132 on the bottom side of the via 130. By this back-drill method, a drill (not shown) is used to bore into the open stub 132 in the bottom layer 22, thereby removing the open stub 132. In practice, however, this method has several drawbacks, such as requiring the use of drilling equipment which is costly and time-consuming to implement, and would easily cause misalignment to the multiple layers of the circuit board 10.